? semiconductor components industries, llc, 2001 october, 2001 rev. 7 1 publication order number: sn74ls42/d sn74ls42 one-of-ten decoder the lsttl/msi sn74ls42 is a multipurpose decoder designed to accept four bcd inputs and provide ten mutually exclusive outputs. the ls42 is fabricated with the schottky barrier diode process for high speed and is completely compatible with all on semiconductor ttl families. ? multifunction capability ? mutually exclusive outputs ? demultiplexing capability ? input clamp diodes limit high speed termination effects guaranteed operating ranges symbol parameter min typ max unit v cc supply voltage 4.75 5.0 5.25 v t a operating ambient temperature range 0 25 70 c i oh output current high 0.4 ma i ol output current low 8.0 ma low power schottky soic d suffix case 751b plastic n suffix case 648 16 1 16 1 soeiaj m suffix case 966 16 1 device package shipping ordering information sn74ls42n 16 pin dip 2000 units/box sn74ls42d soic16 38 units/rail sn74ls42dr2 soic16 2500/tape & reel sn74ls42m soeiaj16 see note 1 sn74ls42mel soeiaj16 1. for ordering information on the eiaj version of the soic package, please contact your local on semiconductor representative. see note 1 http://onsemi.com
sn74ls42 http://onsemi.com 2 logic diagram 1 2 3 4 5 6 0 a 0 a 1 a 2 a 3 9 8 7 v cc = pin 16 gnd = pin 8 = pin numbers logic symbol v cc = pin 16 gnd = pin 8 15 14 13 12 012345 6789 1 23456791011 a 0 a 1 a 2 a 3 14 13 12 11 10 9 123456 v cc 7 16 15 8 a 0 a 1 a 2 a 3 9 8 7 0 1 2 3 4 5 6 gnd connection diagram dip (top view) note: the flatpak version has the same pinouts (connection diagram) as the dual inline package. address inputs outputs, active low a 0 - a 3 0 to 9 0.5 u.l. 10 u.l. 0.25 u.l. 5 u.l. notes: a) 1 ttl unit load (u.l.) = 40 a high/1.6 ma low. high low (note a) loading pin names 15 14 13 12 12 3456 791011
sn74ls42 http://onsemi.com 3 functional description the ls42 decoder accepts four active high bcd inputs and provides ten mutually exclusive active low outputs, as shown by logic symbol or diagram. the active low outputs facilitate addressing other msi units with low input enables. the logic design of the ls42 ensures that all outputs are high when binary codes greater than nine are applied to the inputs. the most significant input a 3 produces a useful inhibit function when the ls42 is used as a one-of-eight decoder. the a 3 input can also be used as the data input in an 8-output demultiplexer application. truth table a 0 a 1 a 2 a 3 0 1 2 3 4 5 6 7 8 9 l h l h l h l h l h l h l h l h l l h h l l h h l l h h l l h h l l l l h h h h l l l l h h h h l l l l l l l l h h h h h h h h l h h h h h h h h h h h h h h h h l h h h h h h h h h h h h h h h h l h h h h h h h h h h h h h h h h l h h h h h h h h h h h h h h h h l h h h h h h h h h h h h h h h h l h h h h h h h h h h h h h h h h l h h h h h h h h h h h h h h h h l h h h h h h h h h h h h h h h h l h h h h h h h h h h h h h h h h l h h h h h h h = high voltage level l = low voltage level
sn74ls42 http://onsemi.com 4 dc characteristics over operating temperature range (unless otherwise specified) limits symbol parameter min typ max unit test conditions v ih input high voltage 2.0 v guaranteed input high voltage for all inputs v il input low voltage 0.8 v guaranteed input low voltage for all inputs v ik input clamp diode voltage 0.65 1.5 v v cc = min, i in = 18 ma v oh output high voltage 2.7 3.5 v v cc = min, i oh = max, v in = v ih or v il per truth table v ol out p ut low voltage 0.25 0.4 v i ol = 4.0 ma v cc = v cc min, v in v il or v ih v ol output low voltage 0.35 0.5 v i ol = 8.0 ma v in = v il or v ih per truth table i ih in p ut high current 20 m a v cc = max, v in = 2.7 v i ih input high current 0.1 ma v cc = max, v in = 7.0 v i il input low current 0.4 ma v cc = max, v in = 0.4 v i os short circuit current (note 2) 20 100 ma v cc = max i cc power supply current 13 ma v cc = max 2. not more than one output should be shorted at a time, nor for more than 1 second. ac characteristics (t a = 25 c) limits symbol parameter min typ max unit test conditions t plh t phl propagation delay (2 levels) 15 15 25 25 ns figure 2 v cc = 5.0 v t plh t phl propagation delay (3 levels) 20 20 30 30 ns figure 1 v cc = 5 . 0 v c l = 15 pf ac waveforms v in v out 1.3 v 1.3 v 1.3 v 1.3 v t phl t plh figure 1. figure 2. 1.3 v 1.3 v 1.3 v 1.3 v t plh t phl v in v out
sn74ls42 http://onsemi.com 5 package dimensions n suffix plastic package case 64808 issue r notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. a b f c s h g d j l m 16 pl seating 18 9 16 k plane t m a m 0.25 (0.010) t dim min max min max millimeters inches a 0.740 0.770 18.80 19.55 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.021 0.39 0.53 f 0.040 0.70 1.02 1.77 g 0.100 bsc 2.54 bsc h 0.050 bsc 1.27 bsc j 0.008 0.015 0.21 0.38 k 0.110 0.130 2.80 3.30 l 0.295 0.305 7.50 7.74 m 0 10 0 10 s 0.020 0.040 0.51 1.01
sn74ls42 http://onsemi.com 6 package dimensions d suffix plastic soic package case 751b05 issue j notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 18 16 9 seating plane f j m r x 45 g 8 pl p b a m 0.25 (0.010) b s t d k c 16 pl s b m 0.25 (0.010) a s t dim min max min max inches millimeters a 9.80 10.00 0.386 0.393 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019
sn74ls42 http://onsemi.com 7 package dimensions h e a 1 dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 0.78 --- 0.031 a 1 h e q 1 l e 10 0 10 l e q 1 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). m l detail p view p c a b e m 0.13 (0.005) 0.10 (0.004) 1 16 9 8 d z e a b c d e e l m z m suffix soeiaj package case 96601 issue o
sn74ls42 http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. sn74ls42/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada
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